Memory Layout Engineer

4–6 years of experience in Memory or Custom Layout Design with strong expertise in memory architectures and layout optimization techniques. Responsibilities: Design and optimize memory layouts for high-performance and low-power applications. Ensure compliance with FinFET technology requirements and DRC rules. Perform physical verification flows (DRC, LVS, ERC) and debug issues effectively. Conduct EM/IR analysis and implement necessary fixes. Collaborate with circuit design teams to ensure layo…